1. Field of the Invention
The present invention relates to a bare chip mounting structure and manufacturing method therefor, and more particularly it relates to resin sealing technology for a flip-chip.
2. Description of Related Art
FIG. 3 shows the prior art in bare semiconductor chip resin sealing technology, in which (a) shows the process of manufacturing a flip-chip mounting, and (b) shows a plan view thereof.
First, in the manufacturing process, as shown in (a), liquid sealing resin 5 is applied in the region of one side of a flip-chip mounted semiconductor chip 1, making use of capillary action in the space between the semiconductor chip 1 and a board 2. After this inflow application is completed, the sealing resin 5 is heat cured.
Additionally, as disclosed in Japanese Unexamined Patent Publications (KOKAI) No. 63-241955 and 1-191457, technology exists by which a through hole is provided in the chip-mounting part of the board, sealing resin being caused to flow from this through hole.
The first problem existing with the prior art is that of requiring a lot of time for sealing when the semiconductor chip is large. The reason for this is that, in causing sealing resin to flow in from one side of the semiconductor chip or a center portion thereof, the distance that the resin must flow is large.
Additionally, because it is not possible to make just a single supply of sealing resin, the resin is supplied in a number of steps over a period of time.
The second problem with the prior art is that if there occurs a warping on a substrate or there is stress caused by a difference in the coefficient of thermal expansion of the semiconductor chip and the substrate, such stress concentrates at bump connections at the corners of the semiconductor chip, and thus the chip and the substrate would be separated from each other leading the connection reliability thereof to be low.
The reason for this is that an amount of the sealing resin fillets in the corners of the flip-chip mounted semiconductor chip are small, so that there is only a small degree of relief for stress caused by either board warp or by the stress caused by such difference in coefficient of thermal expansion.
On the other hand, the sealing resin usually contains fillers made of glass or the like, for example, therein, so as to reduce the coefficient of thermal expansion of the resin.
However, when the distance that the resin must flow is large, the filler cannot be distributed in the sealing resin, creating unevenness in the coefficient of thermal expansion of the overall the resin.
This fact also causes the above-mentioned drawbacks in the semiconductor chip so as to reduce the reliability therefore.
In view of the above-noted drawbacks in the prior art, an object of the present invention is to provide a bare chip mounting method which shortens the amount of time for sealing by pouring resin from a plurality of corners of a semiconductor chip when performing resin sealing for flip-chip mounting, thereby increasing productivity.
Another object of the present invention is to provide a bare chip mounting structure which, by using a structure having a large resin fillet at the corner part the semiconductor chip, relieves stress concentration at the bump connection part of at a corner of the chip when warping or thermal cycling occurs, thereby enabling an improvement in connection reliability.